1. Field of the Invention
The present invention generally relates to a semiconductor package and a method for manufacturing the same. More particularly, the present invention relates to a semiconductor package such as a single in-line package (SIP) or dual in-line package (DIP).
2. Related Arts
Conventionally, as semiconductor packages, there has been an SIP illustrated in FIGS. 26 and 27, for example, in which a hybrid integrated circuit component S is fixed and sealed within a casing 1 with epoxy resin 2.
In the hybrid integrated circuit component S, a semiconductor chip 4 and bonding pads 5 mounted on the surface of a ceramic substrate 3 are connected with respective bonding wires 6. On the surface of the ceramic substrate 3 is bonded an annular rampart-shaped sleeve 7. This sleeve 7 walls the semiconductor chip 4, the respective bonding wires 6 and the respective bonding pads 5 from the outer circumference.
The semiconductor chip 4, the respective bonding wires 6 and the respective bonding pads 5 are fixedly sealed with silicon gel 8 inside the sleeve 7 (FIG. 27). In FIGS. 26 and 27, the reference numeral 9 denotes terminals extending from an end part of the ceramic substrate 3.
In manufacturing the SIP as described above, the present inventors conducted the sealing work as follows: as illustrated in FIG. 28, the ceramic substrate 3 is held with the opening part of the sleeve 7 upwardly facing; the silicon gel 8 is poured onto a region walled by the sleeve 7 with a dispenser 8a; the poured silicon gel 8 is then thermally cured; the resultant ceramic substrate 3, i.e., the hybrid integrated circuit component S, is inserted into the casing 1; the epoxy resin 2 is poured into the casing 1; and then the epoxy resin 2 is thermally set.
However, as it takes extra labor and time to manually perform these steps, there has been a request for automation by using robot hands or the like.